Re: [Intel-gfx] [PATCH v5 1/2] drm/i915/dp: Limit link training clock recovery loop

2018-07-20 Thread Nathan Ciobanu
On Fri, Jul 20, 2018 at 12:22:15PM -0700, Rodrigo Vivi wrote: > On Thu, Jul 19, 2018 at 02:47:38PM -0700, Nathan Ciobanu wrote: > > Limit the link training clock recovery loop to 10 attempts at > > LANEx_CR_DONE per DP 1.4 spec section 3.5.1.2.2 and 80 attempts for > > pre-DP 1.4 (4 voltage levels

Re: [Intel-gfx] [PATCH v5 1/2] drm/i915/dp: Limit link training clock recovery loop

2018-07-20 Thread Rodrigo Vivi
On Thu, Jul 19, 2018 at 02:47:38PM -0700, Nathan Ciobanu wrote: > Limit the link training clock recovery loop to 10 attempts at > LANEx_CR_DONE per DP 1.4 spec section 3.5.1.2.2 and 80 attempts for > pre-DP 1.4 (4 voltage levels x 4 preemphasis levels x > x 5 identical voltages tries). Some faulty

[Intel-gfx] [PATCH v5 1/2] drm/i915/dp: Limit link training clock recovery loop

2018-07-19 Thread Nathan Ciobanu
Limit the link training clock recovery loop to 10 attempts at LANEx_CR_DONE per DP 1.4 spec section 3.5.1.2.2 and 80 attempts for pre-DP 1.4 (4 voltage levels x 4 preemphasis levels x x 5 identical voltages tries). Some faulty USB-C MST hubs can cause us to get stuck in this loop indefinitely reque