Re: [Intel-gfx] [PATCH v5 03/22] drm/i915/dg1: Add DG1 power wells

2020-08-13 Thread Lucas De Marchi
On Tue, Jul 28, 2020 at 01:51:53PM -0700, Matt Roper wrote: On Fri, Jul 24, 2020 at 02:38:59PM -0700, Lucas De Marchi wrote: From: Uma Shankar Most of TGL power wells are re-used for DG1. However, AUDIO Power Domain is moved from PG3 to PG0. Handle the change and initialize power wells with th

Re: [Intel-gfx] [PATCH v5 03/22] drm/i915/dg1: Add DG1 power wells

2020-07-28 Thread Matt Roper
On Fri, Jul 24, 2020 at 02:38:59PM -0700, Lucas De Marchi wrote: > From: Uma Shankar > > Most of TGL power wells are re-used for DG1. However, AUDIO Power > Domain is moved from PG3 to PG0. Handle the change and initialize > power wells with the new power well structure. > > Some of the Audio St

[Intel-gfx] [PATCH v5 03/22] drm/i915/dg1: Add DG1 power wells

2020-07-24 Thread Lucas De Marchi
From: Uma Shankar Most of TGL power wells are re-used for DG1. However, AUDIO Power Domain is moved from PG3 to PG0. Handle the change and initialize power wells with the new power well structure. Some of the Audio Streaming logic still remains in PW3 so still it needs to be enabled. DDIA, DDIB