Tested-By: PRC QA PRTS (Patch Regression Test System Contact:
shuang...@intel.com)
-Summary-
Platform Delta drm-intel-nightly Series Applied
PNV 367/367
On Thu, Nov 20, 2014 at 02:58:16PM +, Damien Lespiau wrote:
> Because the plane registers are different in Skylake we need to adapt
> the MMIO code as well.
>
> v2: Don't introduce yet another vfunc when the direction is do
> consolidate the plane updates to use the same code path (Daniel)
>
Because the plane registers are different in Skylake we need to adapt
the MMIO code as well.
v2: Don't introduce yet another vfunc when the direction is do
consolidate the plane updates to use the same code path (Daniel)
v3:
- Use enum pipe instead of int (Ville)
- Also update PLANE_STRIDE wh
