On Tue, Sep 10, 2019 at 08:42:46AM -0700, Matt Roper wrote:
...
> +struct intel_cdclk_vals {
> + u32 refclk;
Oh, I think (at least currently) refclk would fit into u16,
so we could pack this a bit tighter still.
> + u32 cdclk;
> + u8 divider; /* CD2X divider * 2 */
> + u8 rat
On Tue, Sep 10, 2019 at 08:42:46AM -0700, Matt Roper wrote:
> The bspec lays out legal cdclk frequencies, PLL ratios, and CD2X
> dividers in an easy-to-read table for most recent platforms. We've been
> translating the data from that table into platform-specific code logic,
> but it's easy to over
The bspec lays out legal cdclk frequencies, PLL ratios, and CD2X
dividers in an easy-to-read table for most recent platforms. We've been
translating the data from that table into platform-specific code logic,
but it's easy to overlook an area we need to update when adding new
cdclk values or enabl
