Re: [Intel-gfx] [PATCH v4 2/8] drm/i915/skl: Add DC5 Trigger Sequence.

2015-04-17 Thread Imre Deak
On Fri, 2015-04-17 at 11:29 +0530, Animesh Manna wrote: > > On 4/16/2015 3:18 PM, Imre Deak wrote: > > On to, 2015-04-16 at 12:25 +0300, Imre Deak wrote: > >> On to, 2015-04-16 at 14:22 +0530, Animesh Manna wrote: > >>> [...] > >>> @@ -223,11 +244,13 @@ static void finish_csr_load(const struct f

Re: [Intel-gfx] [PATCH v4 2/8] drm/i915/skl: Add DC5 Trigger Sequence.

2015-04-16 Thread Animesh Manna
On 4/16/2015 3:18 PM, Imre Deak wrote: On to, 2015-04-16 at 12:25 +0300, Imre Deak wrote: On to, 2015-04-16 at 14:22 +0530, Animesh Manna wrote: [...] @@ -223,11 +244,13 @@ static void finish_csr_load(const struct firmware *fw, void *context) if (!fw) { i915_firmware

Re: [Intel-gfx] [PATCH v4 2/8] drm/i915/skl: Add DC5 Trigger Sequence.

2015-04-16 Thread Imre Deak
On to, 2015-04-16 at 12:25 +0300, Imre Deak wrote: > On to, 2015-04-16 at 14:22 +0530, Animesh Manna wrote: > > [...] > > @@ -223,11 +244,13 @@ static void finish_csr_load(const struct firmware > > *fw, void *context) > > > > if (!fw) { > > i915_firmware_load_error_print(csr->fw

Re: [Intel-gfx] [PATCH v4 2/8] drm/i915/skl: Add DC5 Trigger Sequence.

2015-04-16 Thread Imre Deak
On to, 2015-04-16 at 14:22 +0530, Animesh Manna wrote: > From: Suketu Shah > > Add triggers as per expectations mentioned in gen9_enable_dc5 > and gen9_disable_dc5 patch. > > Also call POSTING_READ for every write to a register to ensure that > its written immediately. > > v1: Remove POSTING_RE

[Intel-gfx] [PATCH v4 2/8] drm/i915/skl: Add DC5 Trigger Sequence.

2015-04-16 Thread Animesh Manna
From: Suketu Shah Add triggers as per expectations mentioned in gen9_enable_dc5 and gen9_disable_dc5 patch. Also call POSTING_READ for every write to a register to ensure that its written immediately. v1: Remove POSTING_READ calls as they've already been added in previous patches. v2: Rebase t