Re: [Intel-gfx] [PATCH v4] drm/i915: Signal first fence from irq handler if complete

2017-02-27 Thread Tvrtko Ursulin
On 25/02/2017 10:05, Chris Wilson wrote: As execlists and other non-semaphore multi-engine devices coordinate between engines using interrupts, we can shave off a few 10s of microsecond of scheduling latency by doing the fence signaling from the interrupt as opposed to a RT kthread. (Realistical

[Intel-gfx] [PATCH v4] drm/i915: Signal first fence from irq handler if complete

2017-02-25 Thread Chris Wilson
As execlists and other non-semaphore multi-engine devices coordinate between engines using interrupts, we can shave off a few 10s of microsecond of scheduling latency by doing the fence signaling from the interrupt as opposed to a RT kthread. (Realistically the delay adds about 1% to an individual