Re: [Intel-gfx] [PATCH v3 8/9] drm/i915/bxt: set chicken bit as IPC y-tile WA

2016-09-22 Thread Mahesh Kumar
Hi, On Thursday 22 September 2016 01:53 AM, Paulo Zanoni wrote: Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu: From: Mahesh Kumar It implements the WA to enable IDLE_WAKEMEM bit of CHICKEN_DCPR_1 register for Broxton platform. When IPC is enabled & Y-tile is enabled in any of the

Re: [Intel-gfx] [PATCH v3 8/9] drm/i915/bxt: set chicken bit as IPC y-tile WA

2016-09-22 Thread Paulo Zanoni
Em Qui, 2016-09-22 às 15:13 +0530, Mahesh Kumar escreveu: > Hi, > > > On Thursday 22 September 2016 01:53 AM, Paulo Zanoni wrote: > > > > Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu: > > > > > > From: Mahesh Kumar > > > > > > It implements the WA to enable IDLE_WAKEMEM bit of CH

Re: [Intel-gfx] [PATCH v3 8/9] drm/i915/bxt: set chicken bit as IPC y-tile WA

2016-09-21 Thread Paulo Zanoni
Em Sex, 2016-09-09 às 13:31 +0530, Kumar, Mahesh escreveu: > From: Mahesh Kumar > > It implements the WA to enable IDLE_WAKEMEM bit of CHICKEN_DCPR_1 > register for Broxton platform. When IPC is enabled & Y-tile is > enabled in any of the enabled plane, above bit should be set. > Without this WA

[Intel-gfx] [PATCH v3 8/9] drm/i915/bxt: set chicken bit as IPC y-tile WA

2016-09-09 Thread Kumar, Mahesh
From: Mahesh Kumar It implements the WA to enable IDLE_WAKEMEM bit of CHICKEN_DCPR_1 register for Broxton platform. When IPC is enabled & Y-tile is enabled in any of the enabled plane, above bit should be set. Without this WA system observes random hang. Signed-off-by: Mahesh Kumar --- drivers