Re: [Intel-gfx] [PATCH v3 23/30] drm/i915/dg2: Add MPLLB programming for SNPS PHY

2021-07-29 Thread Matt Atwood
On Fri, Jul 23, 2021 at 10:42:32AM -0700, Matt Roper wrote: > DG2's SNPS PHYs incorporate a dedicated port PLL called MPLLB which > takes the place of the shared DPLLs we've used on past platforms. Let's > add the MPLLB programming sequences; they'll be plugged into the rest of > the code in futur

[Intel-gfx] [PATCH v3 23/30] drm/i915/dg2: Add MPLLB programming for SNPS PHY

2021-07-23 Thread Matt Roper
DG2's SNPS PHYs incorporate a dedicated port PLL called MPLLB which takes the place of the shared DPLLs we've used on past platforms. Let's add the MPLLB programming sequences; they'll be plugged into the rest of the code in future patches. Bspec: 54032 Bspec: 53881 Cc: Lucas De Marchi Signed-of