Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-12-17 Thread Tvrtko Ursulin
On 12/17/2014 05:20 AM, Tian, Kevin wrote: and if you read the paper referred in 1st mail, we call our ballooning as address space ballooning which is different from traditional ballooning technique used in memory virtualization, w/ the major difference as: * traditional ballooning only care ab

Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-12-16 Thread Tian, Kevin
> From: Tvrtko Ursulin > Sent: Friday, December 12, 2014 9:00 PM > > @@ -1683,6 +1684,16 @@ int i915_gem_setup_global_gtt(struct > drm_device *dev, > > > > /* Subtract the guard page ... */ > > drm_mm_init(&ggtt_vm->mm, start, end - start - PAGE_SIZE); > > + > > + dev_priv->gtt.base.start

Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-12-16 Thread Tian, Kevin
> From: Yu, Zhang > Sent: Wednesday, December 17, 2014 11:10 AM > > On 12/16/2014 02:39 PM, Gerd Hoffmann wrote: > > Out of curiosity, what will be the mechanism to prevent a vGPU > > instance > > from ignoring the ballooning data? Must be something in the hypervisor > > blocking pa

Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-12-16 Thread Yu, Zhang
On 12/16/2014 11:15 PM, Tvrtko Ursulin wrote: Hi, On 12/16/2014 02:39 PM, Gerd Hoffmann wrote: Out of curiosity, what will be the mechanism to prevent a vGPU instance from ignoring the ballooning data? Must be something in the hypervisor blocking pass-through access to such domains? Well, a

Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-12-16 Thread Tvrtko Ursulin
Hi, On 12/16/2014 02:39 PM, Gerd Hoffmann wrote: Out of curiosity, what will be the mechanism to prevent a vGPU instance from ignoring the ballooning data? Must be something in the hypervisor blocking pass-through access to such domains? Well, although we have range check logic in the host sid

Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-12-16 Thread Gerd Hoffmann
Hi, > >> Out of curiosity, what will be the mechanism to prevent a vGPU instance > >> from ignoring the ballooning data? Must be something in the hypervisor > >> blocking pass-through access to such domains? > > Well, although we have range check logic in the host side(which checks > > the legal

Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-12-16 Thread Tvrtko Ursulin
On 12/16/2014 01:22 PM, Yu, Zhang wrote: On 12/12/2014 9:00 PM, Tvrtko Ursulin wrote: On 11/13/2014 12:02 PM, Yu Zhang wrote: With Intel GVT-g, the global graphic memory space is partitioned by multiple vGPU instances in different VMs. The ballooning code is called in i915_gem_setup_global_gt

Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-12-16 Thread Yu, Zhang
On 12/12/2014 9:00 PM, Tvrtko Ursulin wrote: On 11/13/2014 12:02 PM, Yu Zhang wrote: With Intel GVT-g, the global graphic memory space is partitioned by multiple vGPU instances in different VMs. The ballooning code is called in i915_gem_setup_global_gtt(), utilizing the drm mm allocator APIs

Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-12-12 Thread Tvrtko Ursulin
On 11/13/2014 12:02 PM, Yu Zhang wrote: With Intel GVT-g, the global graphic memory space is partitioned by multiple vGPU instances in different VMs. The ballooning code is called in i915_gem_setup_global_gtt(), utilizing the drm mm allocator APIs to mark the graphic address space which are part

Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-11-14 Thread Yu, Zhang
On 11/14/2014 6:16 PM, Daniel Vetter wrote: On Thu, Nov 13, 2014 at 08:02:43PM +0800, Yu Zhang wrote: + if (low_gm_base < ggtt_vm->start + || low_gm_end > dev_priv->gtt.mappable_end + || high_gm_base < dev_priv->gtt.mappable_end + || high_gm_end > ggtt_vm_en

Re: [Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-11-14 Thread Daniel Vetter
On Thu, Nov 13, 2014 at 08:02:43PM +0800, Yu Zhang wrote: > + if (low_gm_base < ggtt_vm->start > + || low_gm_end > dev_priv->gtt.mappable_end > + || high_gm_base < dev_priv->gtt.mappable_end > + || high_gm_end > ggtt_vm_end) { Nit: Logical operators like || or && should

[Intel-gfx] [PATCH v3 2/8] drm/i915: Adds graphic address space ballooning logic

2014-11-13 Thread Yu Zhang
With Intel GVT-g, the global graphic memory space is partitioned by multiple vGPU instances in different VMs. The ballooning code is called in i915_gem_setup_global_gtt(), utilizing the drm mm allocator APIs to mark the graphic address space which are partitioned out to other vGPUs as reserved. v2