Re: [Intel-gfx] [PATCH v3 1/1] drm/i915: Update GEN6_PMINTRMSK setup with GuC enabled

2016-05-30 Thread Kamble, Sagar A
On 5/31/2016 1:48 AM, Chris Wilson wrote: On Tue, May 31, 2016 at 12:16:11AM +0530, Sagar Arun Kamble wrote: void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv) @@ -4580,6 +4568,28 @@ void intel_irq_init(struct drm_i915_private *dev_priv) else dev_priv

Re: [Intel-gfx] [PATCH v3 1/1] drm/i915: Update GEN6_PMINTRMSK setup with GuC enabled

2016-05-30 Thread Chris Wilson
On Tue, May 31, 2016 at 12:16:11AM +0530, Sagar Arun Kamble wrote: > void gen6_disable_rps_interrupts(struct drm_i915_private *dev_priv) > @@ -4580,6 +4568,28 @@ void intel_irq_init(struct drm_i915_private *dev_priv) > else > dev_priv->pm_rps_events = GEN6_PM_RPS_EVENTS; > >

[Intel-gfx] [PATCH v3 1/1] drm/i915: Update GEN6_PMINTRMSK setup with GuC enabled

2016-05-30 Thread Sagar Arun Kamble
On Loading, GuC sets PM interrupts routing (bit 31) and clears ARAT expired interrupt (bit 9). Host turbo also updates this register in RPS flows. This patch ensures bit 31 and bit 9 setup by GuC persists. ARAT timer interrupt is needed in GuC for various features. It also facilitates halting GuC a