Re: [Intel-gfx] [PATCH v3] drm/i915: Handle PipeC fused off on IVB/HSW/BDW

2016-01-19 Thread Patrik Jakobsson
On Wed, Jan 13, 2016 at 06:02:52PM +0200, Gabriel Feceoru wrote: > Some Gen7/8 production parts may have the Display Pipe C fused off. > In this case, the display hardware will prevent the Pipe C register bit > from being set to 1. Please elaborate on what pipe c register bit is prevented from bei

[Intel-gfx] [PATCH v3] drm/i915: Handle PipeC fused off on IVB/HSW/BDW

2016-01-13 Thread Gabriel Feceoru
Some Gen7/8 production parts may have the Display Pipe C fused off. In this case, the display hardware will prevent the Pipe C register bit from being set to 1. Fixed by adjusting pipe_count to reflect this. v2: Rename HSW_PIPE_C_DISABLE to IVB_PIPE_C_DISABLE as it already exists on ivybridge