Re: [Intel-gfx] [PATCH v3] drm/i915/icl: Set graphics mode register for gen11

2018-01-19 Thread Daniele Ceraolo Spurio
On 19/01/18 11:30, Kelvin Gardiner wrote: This patch clears a single bit. The bit is 0 by default but expected not to be set. Explicitly clearing the bit in this patch is intended to indicate some thinking has occurred, and that we want this bit cleared and we are not just excepting the default

[Intel-gfx] [PATCH v3] drm/i915/icl: Set graphics mode register for gen11

2018-01-19 Thread Kelvin Gardiner
This patch clears a single bit. The bit is 0 by default but expected not to be set. Explicitly clearing the bit in this patch is intended to indicate some thinking has occurred, and that we want this bit cleared and we are not just excepting the default value. v2 (from Paulo): fix indentation. v3: