On Thu, Mar 03, 2022 at 09:12:07PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Make sure the CDCLK is high enough to support the so called
> "maximum pipe read bandwidth" limitation. Specified as
> 51.2 x CDCLK.
Reviewed-by: Stanislav Lisovskiy
>
> Signed-off-by: Ville Syrjälä
> --
From: Ville Syrjälä
Make sure the CDCLK is high enough to support the so called
"maximum pipe read bandwidth" limitation. Specified as
51.2 x CDCLK.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bw.c | 36 +
drivers/gpu/drm/i915/display/intel_bw.h
