On Thu, Sep 27, 2012 at 08:24:46AM -0700, Jesse Barnes wrote:
> On Thu, 27 Sep 2012 19:13:07 +0530
> Vijay Purushothaman wrote:
>
> > From: Gajanan Bhat
> >
> > Eventhough Valleyview display block is derived from Cantiga, VLV
> > supports eDP. So, added eDP checks in i9xx_crtc_mode_set path.
>
On Thu, 27 Sep 2012 19:13:07 +0530
Vijay Purushothaman wrote:
> From: Gajanan Bhat
>
> Eventhough Valleyview display block is derived from Cantiga, VLV
> supports eDP. So, added eDP checks in i9xx_crtc_mode_set path.
>
> v2: use different DPIO_DIVISOR values for VGA, DP and eDP
> v3: fix DPIO
From: Gajanan Bhat
Eventhough Valleyview display block is derived from Cantiga, VLV
supports eDP. So, added eDP checks in i9xx_crtc_mode_set path.
v2: use different DPIO_DIVISOR values for VGA, DP and eDP
v3: fix DPIO value calculation to use same values for all display
interfaces
v4: removed un