On Mon, 2017-07-10 at 21:11 +0300, Ville Syrjälä wrote:
> On Mon, Jul 10, 2017 at 05:34:11PM +, Pandiyan, Dhinakaran wrote:
> >
> >
> >
> > On Mon, 2017-07-10 at 16:02 +0300, ville.syrj...@linux.intel.com wrote:
> > > From: Ville Syrjälä
> > >
> > > Follow the GLK path when computing cdclk
On Mon, Jul 10, 2017 at 05:34:11PM +, Pandiyan, Dhinakaran wrote:
>
>
>
> On Mon, 2017-07-10 at 16:02 +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä
> >
> > Follow the GLK path when computing cdclk and related limits. CNL
> > pipes also produce two pixels per clock, so
On Mon, Jul 10, 2017 at 10:34:22AM -0700, Rodrigo Vivi wrote:
> cool, with
>
> v2 of patch 1
> v2 of patch 2
> patch 3
>
> display works properly here on cnl.
>
> On Mon, Jul 10, 2017 at 6:02 AM, wrote:
> > From: Ville Syrjälä
> >
> > Follow the GLK path when computing cdclk and related limit
cool, with
v2 of patch 1
v2 of patch 2
patch 3
display works properly here on cnl.
On Mon, Jul 10, 2017 at 6:02 AM, wrote:
> From: Ville Syrjälä
>
> Follow the GLK path when computing cdclk and related limits. CNL
> pipes also produce two pixels per clock, so that's what we should
> really us
On Mon, 2017-07-10 at 16:02 +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä
>
> Follow the GLK path when computing cdclk and related limits. CNL
> pipes also produce two pixels per clock, so that's what we should
> really use. However for the purposes of pixel rate calculatio
From: Ville Syrjälä
Follow the GLK path when computing cdclk and related limits. CNL
pipes also produce two pixels per clock, so that's what we should
really use. However for the purposes of pixel rate calculations we
will assume one pixel per clock to keep the voltage higher, at least
until the
