On Wed, Apr 17, 2013 at 04:05:10PM -0300, Paulo Zanoni wrote:
> Hi
>
> 2013/4/17 Imre Deak :
> > For the device to enter D3 we should enable PCH clock gating.
> >
> > v2:
> > - use HAS_PCH_LPT instead of IS_HASWELL (Ville, Paolo)
> > - rename lpt_allow_clock_gating to lpt_suspend_hw (Paolo)
> >
>
On Wed, 2013-04-17 at 16:05 -0300, Paulo Zanoni wrote:
> Hi
>
> 2013/4/17 Imre Deak :
> > For the device to enter D3 we should enable PCH clock gating.
> >
> > v2:
> > - use HAS_PCH_LPT instead of IS_HASWELL (Ville, Paolo)
> > - rename lpt_allow_clock_gating to lpt_suspend_hw (Paolo)
> >
>
> s/Pa
Hi
2013/4/17 Imre Deak :
> For the device to enter D3 we should enable PCH clock gating.
>
> v2:
> - use HAS_PCH_LPT instead of IS_HASWELL (Ville, Paolo)
> - rename lpt_allow_clock_gating to lpt_suspend_hw (Paolo)
>
s/Paolo/Paulo/ :)
Besides this, the patch looks fine. But I can't test it right n
For the device to enter D3 we should enable PCH clock gating.
v2:
- use HAS_PCH_LPT instead of IS_HASWELL (Ville, Paolo)
- rename lpt_allow_clock_gating to lpt_suspend_hw (Paolo)
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/i915_drv.c |2 ++
drivers/gpu/drm/i915/i915_drv.h |