Re: [Intel-gfx] [PATCH v2] drm/i915: Clean up display pipe register accesses

2014-01-27 Thread Antti Koskipää
On 01/24/14 14:52, Ville Syrjälä wrote: > On Fri, Jan 24, 2014 at 02:13:14PM +0200, Antti Koskipaa wrote: >> +#define PIPE_A_OFFSET 0x7 >> +#define PIPE_B_OFFSET 0x71000 >> +#define PIPE_C_OFFSET 0x72000 > > I'd like a comment here to explain what PIPE_EDP_OFFSET > actually m

Re: [Intel-gfx] [PATCH v2] drm/i915: Clean up display pipe register accesses

2014-01-24 Thread Ville Syrjälä
On Fri, Jan 24, 2014 at 02:13:14PM +0200, Antti Koskipaa wrote: > RFCv2: Reorganize array indexing so that full offsets can be used as > is. It makes grepping for registers in i915_reg.h much easier. Also > move offset arrays to intel_device_info. > > v1: Fixed offsets for VLV, proper eDP handling

[Intel-gfx] [PATCH v2] drm/i915: Clean up display pipe register accesses

2014-01-24 Thread Antti Koskipaa
RFCv2: Reorganize array indexing so that full offsets can be used as is. It makes grepping for registers in i915_reg.h much easier. Also move offset arrays to intel_device_info. v1: Fixed offsets for VLV, proper eDP handling v2: Fixed BCLRPAT, PIPESRC, PIPECONF and DSP* macros. Upcoming hardware