On Fri, 2022-09-23 at 12:45 +, Hogander, Jouni wrote:
> On Fri, 2022-09-23 at 12:37 +, Souza, Jose wrote:
> > On Fri, 2022-09-23 at 06:11 +, Hogander, Jouni wrote:
> > > On Thu, 2022-09-22 at 13:08 +, Souza, Jose wrote:
> > > > On Thu, 2022-09-22 at 10:59 +0300, Jouni Högander wrote
On Fri, 2022-09-23 at 12:37 +, Souza, Jose wrote:
> On Fri, 2022-09-23 at 06:11 +, Hogander, Jouni wrote:
> > On Thu, 2022-09-22 at 13:08 +, Souza, Jose wrote:
> > > On Thu, 2022-09-22 at 10:59 +0300, Jouni Högander wrote:
> > > > Current PSR code is supposed to use TRANSCODER_EDP to fo
On Fri, 2022-09-23 at 06:11 +, Hogander, Jouni wrote:
> On Thu, 2022-09-22 at 13:08 +, Souza, Jose wrote:
> > On Thu, 2022-09-22 at 10:59 +0300, Jouni Högander wrote:
> > > Current PSR code is supposed to use TRANSCODER_EDP to force 0 shift
> > > for
> > > bits in PSR_IMR/IIR registers:
> >
On Thu, 2022-09-22 at 13:08 +, Souza, Jose wrote:
> On Thu, 2022-09-22 at 10:59 +0300, Jouni Högander wrote:
> > Current PSR code is supposed to use TRANSCODER_EDP to force 0 shift
> > for
> > bits in PSR_IMR/IIR registers:
> >
> > /*
> > * gen12+ has registers relative to transcoder and one
On Thu, 2022-09-22 at 10:59 +0300, Jouni Högander wrote:
> Current PSR code is supposed to use TRANSCODER_EDP to force 0 shift for
> bits in PSR_IMR/IIR registers:
>
> /*
> * gen12+ has registers relative to transcoder and one per transcoder
> * using the same bit definition: handle it as TRANSC
Current PSR code is supposed to use TRANSCODER_EDP to force 0 shift for
bits in PSR_IMR/IIR registers:
/*
* gen12+ has registers relative to transcoder and one per transcoder
* using the same bit definition: handle it as TRANSCODER_EDP to force
* 0 shift in bit definition
*/
At the time of wr
