On Mon, Jul 18, 2016 at 11:18:27AM +0100, Chris Wilson wrote:
> On Fri, Jul 15, 2016 at 11:11:20AM +0100, Chris Wilson wrote:
> > @@ -1366,6 +1368,16 @@ i915_gem_object_wait_rendering(struct
> > drm_i915_gem_object *obj,
> > GEM_BUG_ON(obj->active);
> > }
> >
> > + resv = i915_
On Fri, Jul 15, 2016 at 11:11:20AM +0100, Chris Wilson wrote:
> @@ -1366,6 +1368,16 @@ i915_gem_object_wait_rendering(struct
> drm_i915_gem_object *obj,
> GEM_BUG_ON(obj->active);
> }
>
> + resv = i915_gem_object_get_dmabuf_resv(obj);
> + if (resv) {
> + l
When transitioning to the GTT or CPU domain we wait on all rendering
from i915 to complete (with the optimisation of allowing concurrent read
access by both the GPU and client). We don't yet ensure all rendering
from third parties (tracked by implicit fences on the dma-buf) is
complete. Since impli
