Hi
I just tested this series on Haswell, on top of dinq + my watermark
patches. I applied these 6 patches + "Revert "drm/i915: Calculate
correct stolen size for GEN7+"".
Without FBC I was getting around 2.5% PC7 residency with 1920x1080.
Now with a full-screen black-background terminal I get 66%
Display register 46500h bit 23 must be set to 1b for the entire time that
Frame Buffer Compression is enabled.
v2: Ville suggested to enable it back when disabling fbc to avoid wasting
power.
v3: RMW to preserve other bits (by Ville)
v4: Fix from Ville: sed &/| at RMW
Cc: Ville Syrjälä
Revi
On Thu, Apr 25, 2013 at 02:15:25PM -0300, Rodrigo Vivi wrote:
> Display register 46500h bit 23 must be set to 1b for the entire time that
> Frame Buffer Compression is enabled.
>
> v2: Ville suggested to enable it back when disabling fbc to avoid wasting
> power.
>
> v3: RMW to preserve other
Display register 46500h bit 23 must be set to 1b for the entire time that
Frame Buffer Compression is enabled.
v2: Ville suggested to enable it back when disabling fbc to avoid wasting
power.
v3: RMW to preserve other bits (by Ville)
Cc: Ville Syrjälä
Signed-off-by: Rodrigo Vivi
---
drive
On Tue, Apr 23, 2013 at 02:52:21PM -0300, Rodrigo Vivi wrote:
> Display register 46500h bit 23 must be set to 1b for the entire time that
> Frame Buffer Compression is enabled.
>
> v2: Ville suggested to enable it back when disabling fbc to avoid wasting
> power.
>
> Cc: Ville Syrjälä
> Sign
Display register 46500h bit 23 must be set to 1b for the entire time that
Frame Buffer Compression is enabled.
v2: Ville suggested to enable it back when disabling fbc to avoid wasting
power.
Cc: Ville Syrjälä
Signed-off-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/i915_reg.h | 3 +++
drivers
