[Intel-gfx] [PATCH 5/6] drm/i915/cnp: add CNP gmbus support

2017-06-02 Thread Rodrigo Vivi
On CNP PCH based platforms the gmbus is on the south display that is on PCH. The existing implementation for previous platforms already covers the need for CNP expect for the pin pair configuration that follows similar definitions that we had on BXT. v2: Don't drop "_BXT" as the indicator of the f

[Intel-gfx] [PATCH 5/6] drm/i915/cnp: add CNP gmbus support

2017-06-01 Thread Rodrigo Vivi
On CNP PCH based platforms the gmbus is on the south display that is on PCH. The existing implementation for previous platforms already covers the need for CNP expect for the pin pair configuration that follows similar definitions that we had on BXT. v2: Don't drop "_BXT" as the indicator of the f

[Intel-gfx] [PATCH 5/6] drm/i915/cnp: add CNP gmbus support

2017-05-31 Thread Rodrigo Vivi
On CNP PCH based platforms the gmbus is on the south display that is on PCH. The existing implementation for previous platforms already covers the need for CNP expect for the pin pair configuration that follows similar definitions that we had on BXT. v2: Don't drop "_BXT" as the indicator of the f

[Intel-gfx] [PATCH 5/6] drm/i915/cnp: add CNP gmbus support

2017-05-30 Thread Rodrigo Vivi
On CNP PCH based platforms the gmbus is on the south display that is on PCH. The existing implementation for previous platforms already covers the need for CNP expect for the pin pair configuration that follows similar definitions that we had on BXT. v2: Don't drop "_BXT" as the indicator of the f

[Intel-gfx] [PATCH 5/6] drm/i915/cnp: add CNP gmbus support

2017-05-30 Thread Rodrigo Vivi
On CNP PCH based platforms the gmbus is on the south display that is on PCH. The existing implementation for previous platforms already covers the need for CNP expect for the pin pair configuration that follows similar definitions that we had on BXT. v2: Don't drop "_BXT" as the indicator of the f

Re: [Intel-gfx] [PATCH 5/6] drm/i915/cnp: add CNP gmbus support

2017-05-23 Thread Vivi, Rodrigo
On Tue, 2017-05-09 at 12:16 -0700, Anusha Srivatsa wrote: > From: Rodrigo Vivi > > On CNP PCH based platforms the gmbus is on the south display that > is on PCH. The existing implementation for previous platforms > already covers the need for CNP expect for the pin pair configuration > that follo

[Intel-gfx] [PATCH 5/6] drm/i915/cnp: add CNP gmbus support

2017-05-09 Thread Anusha Srivatsa
From: Rodrigo Vivi On CNP PCH based platforms the gmbus is on the south display that is on PCH. The existing implementation for previous platforms already covers the need for CNP expect for the pin pair configuration that follows similar definitions that we had on BXT. v2: Don't drop "_BXT" as t

[Intel-gfx] [PATCH 5/6] drm/i915/cnp: add CNP gmbus support

2017-05-08 Thread Anusha Srivatsa
From: Rodrigo Vivi On CNP PCH based platforms the gmbus is on the south display that is on PCH. The existing implementation for previous platforms already covers the need for CNP expect for the pin pair configuration that follows similar definitions that we had on BXT. v2: Don't drop "_BXT" as t