Re: [Intel-gfx] [PATCH 41/49] drm/i915/bdw: LR context switch interrupts

2014-04-02 Thread Damien Lespiau
On Wed, Apr 02, 2014 at 01:49:38PM +0200, Daniel Vetter wrote: > On Wed, Apr 02, 2014 at 12:42:11PM +0100, Damien Lespiau wrote: > > On Thu, Mar 27, 2014 at 06:00:10PM +, oscar.ma...@intel.com wrote: > > > @@ -543,6 +545,9 @@ static int init_ring_common_lrc(struct intel_engine > > > *ring) > >

Re: [Intel-gfx] [PATCH 41/49] drm/i915/bdw: LR context switch interrupts

2014-04-02 Thread Daniel Vetter
On Wed, Apr 02, 2014 at 12:42:11PM +0100, Damien Lespiau wrote: > On Thu, Mar 27, 2014 at 06:00:10PM +, oscar.ma...@intel.com wrote: > > @@ -543,6 +545,9 @@ static int init_ring_common_lrc(struct intel_engine > > *ring) > > ringbuf->space = ringbuf->size; > > ringbuf->last_retired_head

Re: [Intel-gfx] [PATCH 41/49] drm/i915/bdw: LR context switch interrupts

2014-04-02 Thread Damien Lespiau
On Thu, Mar 27, 2014 at 06:00:10PM +, oscar.ma...@intel.com wrote: > @@ -543,6 +545,9 @@ static int init_ring_common_lrc(struct intel_engine *ring) > ringbuf->space = ringbuf->size; > ringbuf->last_retired_head = -1; > > + I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->i

[Intel-gfx] [PATCH 41/49] drm/i915/bdw: LR context switch interrupts

2014-03-27 Thread oscar . mateo
From: Thomas Daniel We need to attend context switch interrupts from all rings. Also, fixed writing IMR/IER and added HWSTAM at ring init time. Notice that, if added to irq_enable_mask, the context switch interrupts would be incorrectly masked out when the user interrupts are due to no users wai