On Mon, 2012-04-16 at 01:10 +0200, Daniel Vetter wrote:
> But while looking through the git history I've noticed that this code got
> added before we've figured out the vbios sdvo ddc pin mappings game, so
> I'm inclined to just rip this out. Especially since we start at the ddc
> that does _not_
On Thu, Jun 16, 2011 at 04:36:26PM -0400, Adam Jackson wrote:
> The comment was wrong, bus 0 is the SPD ROM, as we discovered in
> 14571b4 and b108333.
>
> Signed-off-by: Adam Jackson
I've checked with the SDVO spec and the ddc bus switch command uses a
bitflag array, and bit 0 (i.e. 1) is used
On Thu, 16 Jun 2011 21:58:42 +0100, Chris Wilson
wrote:
> Rolf,
>
> This looks to be the missing ingredient for your board. Can you please
> give it a test?
I haven't seen a tested-by, reviewed-by or even acked-by for this patch
yet.
--
keith.pack...@intel.com
pgpcDBAvWm0UU.pgp
Description:
Rolf,
This looks to be the missing ingredient for your board. Can you please
give it a test?
-Chris
On Thu, 16 Jun 2011 16:36:26 -0400, Adam Jackson wrote:
> The comment was wrong, bus 0 is the SPD ROM, as we discovered in
> 14571b4 and b108333.
>
> Signed-off-by: Adam Jackson
> ---
> drivers
The comment was wrong, bus 0 is the SPD ROM, as we discovered in
14571b4 and b108333.
Signed-off-by: Adam Jackson
---
drivers/gpu/drm/i915/intel_sdvo.c |7 ++-
1 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c
b/drivers/gpu/drm/i915/intel_s
