On Wed, 2013-10-16 at 08:08 -0700, Jesse Barnes wrote:
> On Wed, 16 Oct 2013 14:10:13 +0300
> Imre Deak wrote:
>
> > On Tue, 2013-10-15 at 13:40 -0700, Jesse Barnes wrote:
> > > On Tue, 15 Oct 2013 16:54:00 -0300
> > > Paulo Zanoni wrote:
> > > [...]
> > > No that's taken into account here. In
On Wed, 16 Oct 2013 14:10:13 +0300
Imre Deak wrote:
> On Tue, 2013-10-15 at 13:40 -0700, Jesse Barnes wrote:
> > On Tue, 15 Oct 2013 16:54:00 -0300
> > Paulo Zanoni wrote:
> > [...]
> > No that's taken into account here. In __intel_set_mode we take a
> > private ref on the appropriate power wel
On Tue, 2013-10-15 at 13:40 -0700, Jesse Barnes wrote:
> On Tue, 15 Oct 2013 16:54:00 -0300
> Paulo Zanoni wrote:
> [...]
> No that's taken into account here. In __intel_set_mode we take a
> private ref on the appropriate power well so that we'll preserve state
> until we do the first crtc_enable
2013/10/15 Jesse Barnes :
> On Tue, 15 Oct 2013 17:47:20 -0300
> Paulo Zanoni wrote:
>
>> 2013/10/15 Jesse Barnes :
>> > On Tue, 15 Oct 2013 16:54:00 -0300
>> > Paulo Zanoni wrote:
>> >
>> >> 2013/10/14 Jesse Barnes :
>> >> > When accessing the display regs for hw state readout or cross check, we
On Tue, 15 Oct 2013 17:47:20 -0300
Paulo Zanoni wrote:
> 2013/10/15 Jesse Barnes :
> > On Tue, 15 Oct 2013 16:54:00 -0300
> > Paulo Zanoni wrote:
> >
> >> 2013/10/14 Jesse Barnes :
> >> > When accessing the display regs for hw state readout or cross check, we
> >> > need to make sure the power w
2013/10/15 Jesse Barnes :
> On Tue, 15 Oct 2013 16:54:00 -0300
> Paulo Zanoni wrote:
>
>> 2013/10/14 Jesse Barnes :
>> > When accessing the display regs for hw state readout or cross check, we
>> > need to make sure the power well is enabled so we can read valid
>> > register state.
>>
>> On the c
On Tue, 15 Oct 2013 16:54:00 -0300
Paulo Zanoni wrote:
> 2013/10/14 Jesse Barnes :
> > When accessing the display regs for hw state readout or cross check, we
> > need to make sure the power well is enabled so we can read valid
> > register state.
>
> On the current code (HSW) we already check f
2013/10/14 Jesse Barnes :
> When accessing the display regs for hw state readout or cross check, we
> need to make sure the power well is enabled so we can read valid
> register state.
On the current code (HSW) we already check for the power wells in the
HW state readout code: if the power well is
When accessing the display regs for hw state readout or cross check, we
need to make sure the power well is enabled so we can read valid
register state.
Likewise, in an actual mode set, we need to take a ref on the
appropriate power well so that the mode set succeeds. From then on, the
power well
