Re: [Intel-gfx] [PATCH 4/5] drm/i915: properly set HSW WM_LP watermarks

2013-05-29 Thread Ville Syrjälä
On Wed, May 29, 2013 at 07:06:15PM +0300, Ville Syrjälä wrote: > On Fri, May 24, 2013 at 07:05:12PM -0300, Paulo Zanoni wrote: > > From: Paulo Zanoni > > > > We were previously only setting the WM_PIPE registers, now we are > > setting the LP watermark registers. This should allow deeper PC > > s

Re: [Intel-gfx] [PATCH 4/5] drm/i915: properly set HSW WM_LP watermarks

2013-05-29 Thread Ville Syrjälä
On Fri, May 24, 2013 at 07:05:12PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > We were previously only setting the WM_PIPE registers, now we are > setting the LP watermark registers. This should allow deeper PC > states, resulting in power savings. > > We're only using 1/2 data buffer pa

[Intel-gfx] [PATCH 4/5] drm/i915: properly set HSW WM_LP watermarks

2013-05-24 Thread Paulo Zanoni
From: Paulo Zanoni We were previously only setting the WM_PIPE registers, now we are setting the LP watermark registers. This should allow deeper PC states, resulting in power savings. We're only using 1/2 data buffer partitioning for now. v2: Merge both hsw_compute_pri_wm_* functions (Ville)

Re: [Intel-gfx] [PATCH 4/5] drm/i915: properly set HSW WM_LP watermarks

2013-05-24 Thread Ville Syrjälä
On Fri, May 24, 2013 at 11:59:20AM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > We were previously only setting the WM_PIPE registers, now we are > setting the LP watermark registers. This should allow deeper PC > states, resulting in power savings. > > We're only using 1/2 data buffer pa

[Intel-gfx] [PATCH 4/5] drm/i915: properly set HSW WM_LP watermarks

2013-05-24 Thread Paulo Zanoni
From: Paulo Zanoni We were previously only setting the WM_PIPE registers, now we are setting the LP watermark registers. This should allow deeper PC states, resulting in power savings. We're only using 1/2 data buffer partitioning for now. Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/