Re: [Intel-gfx] [PATCH 3/5] i965/skl: Set tile width and height for YF/YS tiling

Hi, On 03/30/2015 10:00 PM, Anuj Phogat wrote: I'm still passing tiling=I915_TILING_Y in drm_intel_gem_bo_alloc_internal() in case of YF/YS tiling. Passing tiling=I915_TILING_{YF,YS} causes bo allocation failure. Any advice what's the right thing to do here? Officially approved idea is to pas

[Intel-gfx] [PATCH 3/5] i965/skl: Set tile width and height for YF/YS tiling

I'm still passing tiling=I915_TILING_Y in drm_intel_gem_bo_alloc_internal() in case of YF/YS tiling. Passing tiling=I915_TILING_{YF,YS} causes bo allocation failure. Any advice what's the right thing to do here? Signed-off-by: Anuj Phogat --- intel/intel_bufmgr_gem.c | 49 +++