On Tue, Nov 04, 2014 at 12:04:03PM +0100, Daniel Vetter wrote:
> On Tue, Oct 28, 2014 at 03:10:14PM +0200, Ander Conselvan de Oliveira wrote:
> > @@ -9400,7 +9419,7 @@ static int intel_queue_mmio_flip(struct drm_device
> > *dev,
> > struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> >
On Tue, Oct 28, 2014 at 03:10:14PM +0200, Ander Conselvan de Oliveira wrote:
> @@ -9400,7 +9419,7 @@ static int intel_queue_mmio_flip(struct drm_device *dev,
> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> int ret;
>
> - if (WARN_ON(intel_crtc->mmio_flip.seqno))
> + i
Hi Paulo,
Thanks for reviewing.
On 11/03/2014 08:37 PM, Paulo Zanoni wrote:
2014-10-28 11:10 GMT-02:00 Ander Conselvan de Oliveira
:
Currently we program just DPSCNTR and DSPSTRIDE directly from the ring
interrupt handler, which is fine since the hardware guarantees that
those are update atomi
On Mon, Nov 3, 2014 at 8:13 PM, Paulo Zanoni wrote:
> 2014-11-03 16:53 GMT-02:00 Daniel Vetter :
>> On Mon, Nov 3, 2014 at 7:37 PM, Paulo Zanoni wrote:
>>> Besides this, my only worry is what is going to happen if we disable
>>> the CRTC or plane (or even suspend - S3 or runtime - or something li
2014-11-03 16:53 GMT-02:00 Daniel Vetter :
> On Mon, Nov 3, 2014 at 7:37 PM, Paulo Zanoni wrote:
>> Besides this, my only worry is what is going to happen if we disable
>> the CRTC or plane (or even suspend - S3 or runtime - or something like
>> that) after we schedule the work, but before the wor
On Mon, Nov 3, 2014 at 7:37 PM, Paulo Zanoni wrote:
> Besides this, my only worry is what is going to happen if we disable
> the CRTC or plane (or even suspend - S3 or runtime - or something like
> that) after we schedule the work, but before the work actually
> happens. Isn't it possible to end u
2014-10-28 11:10 GMT-02:00 Ander Conselvan de Oliveira
:
> Currently we program just DPSCNTR and DSPSTRIDE directly from the ring
> interrupt handler, which is fine since the hardware guarantees that
> those are update atomically. When we have atomic page flips we'll want
> to be able to update als
On Tue, Oct 28, 2014 at 03:10:14PM +0200, Ander Conselvan de Oliveira wrote:
> Currently we program just DPSCNTR and DSPSTRIDE directly from the ring
> interrupt handler, which is fine since the hardware guarantees that
> those are update atomically. When we have atomic page flips we'll want
> to b
Currently we program just DPSCNTR and DSPSTRIDE directly from the ring
interrupt handler, which is fine since the hardware guarantees that
those are update atomically. When we have atomic page flips we'll want
to be able to update also the offset registers, and then we need to use
the vblank evade
