Re: [Intel-gfx] [PATCH 3/3] drm/i915: Add support for explicit L3BANK steering

2021-06-15 Thread Tvrtko Ursulin
On 15/06/2021 04:34, Matt Roper wrote: Because Render Power Gating restricts us to just a single subslice as a valid steering target for reads of multicast registers in a SUBSLICE range, the default steering we setup at init may not lead to a suitable target for L3BANK multicast register. In c

[Intel-gfx] [PATCH 3/3] drm/i915: Add support for explicit L3BANK steering

2021-06-14 Thread Matt Roper
Because Render Power Gating restricts us to just a single subslice as a valid steering target for reads of multicast registers in a SUBSLICE range, the default steering we setup at init may not lead to a suitable target for L3BANK multicast register. In cases where it does not, use explicit runtim