On Mon, 2015-08-24 at 14:14 +, Zanoni, Paulo R wrote:
> Em Qui, 2015-08-20 às 17:55 -0700, Rodrigo Vivi escreveu:
> > According to spec the disable sequence is:
> > Driver will do the following on PSR Disable.
> > 1. Disable PSR in PSR control register, SRD_CTL[bit 31].
> > 2. Poll on PSR idle
Em Qui, 2015-08-20 às 17:55 -0700, Rodrigo Vivi escreveu:
> According to spec the disable sequence is:
> Driver will do the following on PSR Disable.
> 1. Disable PSR in PSR control register, SRD_CTL[bit 31].
> 2. Poll on PSR idle
> 3. Wait for VBlank
> 4. Disable VSC DIP.
Shouldn't this be done a
According to spec the disable sequence is:
Driver will do the following on PSR Disable.
1. Disable PSR in PSR control register, SRD_CTL[bit 31].
2. Poll on PSR idle
3. Wait for VBlank
4. Disable VSC DIP.
Signed-off-by: Rodrigo Vivi
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drivers/gpu/drm/i915/intel_psr.c | 10 ++
1 file cha
