Re: [Intel-gfx] [PATCH 2/4] drm/i915: report Gen5+ CPU and PCH FIFO underruns

2013-04-12 Thread Paulo Zanoni
Hi 2013/3/28 Daniel Vetter : > On Fri, Feb 22, 2013 at 05:05:29PM -0300, Paulo Zanoni wrote: >> From: Paulo Zanoni >> >> In this commit we enable both CPU and PCH FIFO underrun reporting and >> start reporting them. We follow a few rules: >> - after we receive one of these errors, we mask the i

Re: [Intel-gfx] [PATCH 2/4] drm/i915: report Gen5+ CPU and PCH FIFO underruns

2013-03-28 Thread Daniel Vetter
On Fri, Feb 22, 2013 at 9:05 PM, Paulo Zanoni wrote: > diff --git a/drivers/gpu/drm/i915/intel_drv.h > b/drivers/gpu/drm/i915/intel_drv.h > index 010e998..aa8f948 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -238,6 +238,9 @@ struct intel_crtc { > >

Re: [Intel-gfx] [PATCH 2/4] drm/i915: report Gen5+ CPU and PCH FIFO underruns

2013-03-28 Thread Daniel Vetter
On Fri, Feb 22, 2013 at 05:05:29PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > In this commit we enable both CPU and PCH FIFO underrun reporting and > start reporting them. We follow a few rules: > - after we receive one of these errors, we mask the interrupt, so > we won't get an "

[Intel-gfx] [PATCH 2/4] drm/i915: report Gen5+ CPU and PCH FIFO underruns

2013-02-22 Thread Paulo Zanoni
From: Paulo Zanoni In this commit we enable both CPU and PCH FIFO underrun reporting and start reporting them. We follow a few rules: - after we receive one of these errors, we mask the interrupt, so we won't get an "interrupt storm" and we also won't flood dmesg; - at each mode set we en