Re: [Intel-gfx] [PATCH 2/3] drm/i915: properly set HSW WM_LP watermarks

2013-05-31 Thread Ville Syrjälä
On Fri, May 31, 2013 at 11:45:06AM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > We were previously only setting the WM_PIPE registers, now we are > setting the LP watermark registers. This should allow deeper PC > states, resulting in power savings. > > We're only using 1/2 data buffer pa

[Intel-gfx] [PATCH 2/3] drm/i915: properly set HSW WM_LP watermarks

2013-05-31 Thread Paulo Zanoni
From: Paulo Zanoni We were previously only setting the WM_PIPE registers, now we are setting the LP watermark registers. This should allow deeper PC states, resulting in power savings. We're only using 1/2 data buffer partitioning for now. v2: Merge both hsw_compute_pri_wm_* functions (Ville) v

Re: [Intel-gfx] [PATCH 2/3] drm/i915: properly set HSW WM_LP watermarks

2013-05-31 Thread Ville Syrjälä
On Fri, May 31, 2013 at 10:12:22AM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > We were previously only setting the WM_PIPE registers, now we are > setting the LP watermark registers. This should allow deeper PC > states, resulting in power savings. > > We're only using 1/2 data buffer pa

[Intel-gfx] [PATCH 2/3] drm/i915: properly set HSW WM_LP watermarks

2013-05-31 Thread Paulo Zanoni
From: Paulo Zanoni We were previously only setting the WM_PIPE registers, now we are setting the LP watermark registers. This should allow deeper PC states, resulting in power savings. We're only using 1/2 data buffer partitioning for now. v2: Merge both hsw_compute_pri_wm_* functions (Ville) v