On Mon, 30 Jun 2014 08:05:34 -0700
Jesse Barnes wrote:
> On Sat, 28 Jun 2014 16:45:03 +0300
> Jani Nikula wrote:
> > >> +/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the
> > >> result
> > >> + * to [hw_min..hw_max]. */
> > >> +static inline u32 clamp_user_to_hw(struct int
On Sat, 28 Jun 2014 16:45:03 +0300
Jani Nikula wrote:
> >> +/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the
> >> result
> >> + * to [hw_min..hw_max]. */
> >> +static inline u32 clamp_user_to_hw(struct intel_connector *connector,
> >> + u32 user_
On Fri, 27 Jun 2014, Jesse Barnes wrote:
> On Tue, 24 Jun 2014 18:27:40 +0300
> Jani Nikula wrote:
>
>> Historically we've exposed the full backlight PWM duty cycle range to
>> the userspace, in the name of "mechanism, not policy". However, it turns
>> out there are both panels and board designs
On Tue, 24 Jun 2014 18:27:40 +0300
Jani Nikula wrote:
> Historically we've exposed the full backlight PWM duty cycle range to
> the userspace, in the name of "mechanism, not policy". However, it turns
> out there are both panels and board designs where there is a minimum
> duty cycle that is requ
Historically we've exposed the full backlight PWM duty cycle range to
the userspace, in the name of "mechanism, not policy". However, it turns
out there are both panels and board designs where there is a minimum
duty cycle that is required for proper operation. The minimum duty cycle
is available i
