Re: [Intel-gfx] [PATCH 2/2] drm/i915: Change Mipi register definitions

2014-05-30 Thread Damien Lespiau
On Fri, May 30, 2014 at 09:05:41AM +0100, Sharma, Shashank wrote: > From: Sharma, Shashank > Sent: Thursday, May 22, 2014 5:02 PM > To: intel-gfx@lists.freedesktop.org; Lespiau, Damien; > ville.syrj...@linux.intel.com; Vetter, Daniel > Cc: Kumar, Shobhit; Sharma, Shashank > Subject: [PATCH 2/2] d

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Change Mipi register definitions

2014-05-30 Thread Sharma, Shashank
Gentle reminder for review. Regards Shashank -Original Message- From: Sharma, Shashank Sent: Thursday, May 22, 2014 5:02 PM To: intel-gfx@lists.freedesktop.org; Lespiau, Damien; ville.syrj...@linux.intel.com; Vetter, Daniel Cc: Kumar, Shobhit; Sharma, Shashank Subject: [PATCH 2/2] drm/i

[Intel-gfx] [PATCH 2/2] drm/i915: Change Mipi register definitions

2014-05-22 Thread Shashank Sharma
Re-define MIPI register definitions in such a way that most of the existing DSI code can be re-used for future platforms. Register definitions are re-written using MMIO offset variable, so that without changing the existing sequence, same code can be generically applied. V3: Addressing review comm

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Change Mipi register definitions

2014-05-21 Thread Damien Lespiau
On Wed, May 21, 2014 at 06:35:12PM +0300, Ville Syrjälä wrote: > > + > > +/* VLV port control */ > > #define _MIPIA_PORT_CTRL (VLV_DISPLAY_BASE + 0x61190) > > #define _MIPIB_PORT_CTRL (VLV_DISPLAY_BASE + 0x61700) > > #define MIPI_PORT_CTRL(pipe)

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Change Mipi register definitions

2014-05-21 Thread Sharma, Shashank
@lists.freedesktop.org; Nikula, Jani Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915: Change Mipi register definitions On Wed, May 21, 2014 at 08:56:59PM +0530, Shashank Sharma wrote: > Re-define MIPI register definitions in such a way that most of the > existing DSI code can be re-used for

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Change Mipi register definitions

2014-05-21 Thread Ville Syrjälä
On Wed, May 21, 2014 at 08:56:59PM +0530, Shashank Sharma wrote: > Re-define MIPI register definitions in such a way that most of > the existing DSI code can be re-used for future platforms. Register > definitions are re-written using MMIO offset variable, so that without > changing the existing se

[Intel-gfx] [PATCH 2/2] drm/i915: Change Mipi register definitions

2014-05-21 Thread Shashank Sharma
Re-define MIPI register definitions in such a way that most of the existing DSI code can be re-used for future platforms. Register definitions are re-written using MMIO offset variable, so that without changing the existing sequence, same code can be generically applied. V2: Addressing review comm

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Change Mipi register definitions

2014-05-19 Thread Damien Lespiau
On Mon, May 19, 2014 at 08:54:04PM +0530, Shashank Sharma wrote: > Re-define MIPI register definitions in such a way that most of > the existing DSI code can be re-used for future platforms. Register > definitions are re-written using MMIO offset variable, so that without > changing the existing se

[Intel-gfx] [PATCH 2/2] drm/i915: Change Mipi register definitions

2014-05-19 Thread Shashank Sharma
Re-define MIPI register definitions in such a way that most of the existing DSI code can be re-used for future platforms. Register definitions are re-written using MMIO offset variable, so that without changing the existing sequence, same code can be generically applied. Signed-off-by: Shashank Sh