From: Prathap Kumar Valsan
On gen7 and gen7.5 devices, there could be leftover data residuals in
EU/L3 from the retiring context. This patch introduces workaround to clear
that residual contexts, by submitting a batch buffer with dedicated HW
context to the GPU with ring allocation for each conte
Quoting Bloomfield, Jon (2020-01-31 17:45:02)
> Reducing audience as this series is of high interest externally.
>
> I fully agree with Joonas' suggestion here, and we have been looking at doing
> just that. But can we iterate as a follow up patch series? Putting in the
> infra to support igt as
Reducing audience as this series is of high interest externally.
I fully agree with Joonas' suggestion here, and we have been looking at doing
just that. But can we iterate as a follow up patch series? Putting in the infra
to support igt assembly from source will take a little time (igt assemble
Quoting Akeem G Abodunrin (2020-01-30 18:57:21)
> From: Prathap Kumar Valsan
>
> On gen7 and gen7.5 devices, there could be leftover data residuals in
> EU/L3 from the retiring context. This patch introduces workaround to clear
> that residual contexts, by submitting a batch buffer with dedicated
On Thu, 30 Jan 2020, Akeem G Abodunrin wrote:
> diff --git a/drivers/gpu/drm/i915/i915_utils.h
> b/drivers/gpu/drm/i915/i915_utils.h
> index b0ade76bec90..7ac5b3565845 100644
> --- a/drivers/gpu/drm/i915/i915_utils.h
> +++ b/drivers/gpu/drm/i915/i915_utils.h
> @@ -172,6 +172,11 @@ __check_struct_
From: Prathap Kumar Valsan
On gen7 and gen7.5 devices, there could be leftover data residuals in
EU/L3 from the retiring context. This patch introduces workaround to clear
that residual contexts, by submitting a batch buffer with dedicated HW
context to the GPU with ring allocation for each conte
