Re: [Intel-gfx] [PATCH 15/15] drm/i915/xehp: Eliminate shared/implicit steering

2022-04-07 Thread Tvrtko Ursulin
On 04/04/2022 22:42, Matt Roper wrote: On Fri, Apr 01, 2022 at 09:34:04AM +0100, Tvrtko Ursulin wrote: On 31/03/2022 00:28, Matt Roper wrote: Historically we've selected and programmed a single MCR group/instance ID at driver startup that will steer register accesses for GSLICE/DSS ranges to

Re: [Intel-gfx] [PATCH 15/15] drm/i915/xehp: Eliminate shared/implicit steering

2022-04-07 Thread Tvrtko Ursulin
On 04/04/2022 22:35, Matt Roper wrote: On Thu, Mar 31, 2022 at 06:35:52PM +0100, Tvrtko Ursulin wrote: On 31/03/2022 00:28, Matt Roper wrote: Historically we've selected and programmed a single MCR group/instance ID at driver startup that will steer register accesses for GSLICE/DSS ranges to

Re: [Intel-gfx] [PATCH 15/15] drm/i915/xehp: Eliminate shared/implicit steering

2022-04-04 Thread Matt Roper
On Fri, Apr 01, 2022 at 09:34:04AM +0100, Tvrtko Ursulin wrote: > > On 31/03/2022 00:28, Matt Roper wrote: > > Historically we've selected and programmed a single MCR group/instance > > ID at driver startup that will steer register accesses for GSLICE/DSS > > ranges to a non-terminated instance.

Re: [Intel-gfx] [PATCH 15/15] drm/i915/xehp: Eliminate shared/implicit steering

2022-04-04 Thread Matt Roper
On Thu, Mar 31, 2022 at 06:35:52PM +0100, Tvrtko Ursulin wrote: > > On 31/03/2022 00:28, Matt Roper wrote: > > Historically we've selected and programmed a single MCR group/instance > > ID at driver startup that will steer register accesses for GSLICE/DSS > > ranges to a non-terminated instance.

Re: [Intel-gfx] [PATCH 15/15] drm/i915/xehp: Eliminate shared/implicit steering

2022-04-01 Thread Tvrtko Ursulin
On 31/03/2022 00:28, Matt Roper wrote: Historically we've selected and programmed a single MCR group/instance ID at driver startup that will steer register accesses for GSLICE/DSS ranges to a non-terminated instance. Any reads of these register ranges that don't need a specific unicast access

Re: [Intel-gfx] [PATCH 15/15] drm/i915/xehp: Eliminate shared/implicit steering

2022-03-31 Thread Tvrtko Ursulin
On 31/03/2022 00:28, Matt Roper wrote: Historically we've selected and programmed a single MCR group/instance ID at driver startup that will steer register accesses for GSLICE/DSS ranges to a non-terminated instance. Any reads of these register ranges that don't need a specific unicast access

[Intel-gfx] [PATCH 15/15] drm/i915/xehp: Eliminate shared/implicit steering

2022-03-30 Thread Matt Roper
Historically we've selected and programmed a single MCR group/instance ID at driver startup that will steer register accesses for GSLICE/DSS ranges to a non-terminated instance. Any reads of these register ranges that don't need a specific unicast access won't bother explicitly resteering because