Re: [Intel-gfx] [PATCH 12/16] drm/i915: Enable per-lane drive settings for icl+

2021-10-29 Thread Souza, Jose
On Wed, 2021-10-06 at 23:49 +0300, Ville Syrjala wrote: > From: Ville Syrjälä > > Now that the link buf_trans, link training, and the > combo/mg/dkl/snps phy programming are all fixed up we can > allow per-lane DP drive settings on icl+. Make it so. Reviewed-by: José Roberto de Souza > > Sign

[Intel-gfx] [PATCH 12/16] drm/i915: Enable per-lane drive settings for icl+

2021-10-06 Thread Ville Syrjala
From: Ville Syrjälä Now that the link buf_trans, link training, and the combo/mg/dkl/snps phy programming are all fixed up we can allow per-lane DP drive settings on icl+. Make it so. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dp_link_training.c | 5 - 1 file chang