Re: [Intel-gfx] [PATCH 11/15] drm/i915: Enable DPIO SUS clock gating on CHV

2015-08-19 Thread Deepak
On 07/09/2015 02:15 AM, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä CHV has supports some form of automagic clock gating for the DPIO SUS clock. We can simply enable the magic bits and the hardware should take care of the rest. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm

[Intel-gfx] [PATCH 11/15] drm/i915: Enable DPIO SUS clock gating on CHV

2015-07-08 Thread ville . syrjala
From: Ville Syrjälä CHV has supports some form of automagic clock gating for the DPIO SUS clock. We can simply enable the magic bits and the hardware should take care of the rest. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_reg.h | 4 drivers/gpu/drm/i915/intel_runt