Re: [Intel-gfx] [PATCH 1/7] drm/i915: Enable edp psr error interrupts on hsw

2016-05-19 Thread Jindal, Sonika
On 5/18/2016 11:56 PM, Ville Syrjälä wrote: On Wed, May 18, 2016 at 06:47:10PM +0200, Daniel Vetter wrote: The definitions for the error register should be valid on bdw/skl too, but there we haven't even enabled DE_MISC handling yet. Somewhat confusing the the moved register offset on bdw is

Re: [Intel-gfx] [PATCH 1/7] drm/i915: Enable edp psr error interrupts on hsw

2016-05-18 Thread Ville Syrjälä
On Wed, May 18, 2016 at 06:47:10PM +0200, Daniel Vetter wrote: > The definitions for the error register should be valid on bdw/skl too, > but there we haven't even enabled DE_MISC handling yet. > > Somewhat confusing the the moved register offset on bdw is only for > the _CTL/_AUX register, and th

[Intel-gfx] [PATCH 1/7] drm/i915: Enable edp psr error interrupts on hsw

2016-05-18 Thread Daniel Vetter
The definitions for the error register should be valid on bdw/skl too, but there we haven't even enabled DE_MISC handling yet. Somewhat confusing the the moved register offset on bdw is only for the _CTL/_AUX register, and that _IIR/IMR stayed where they have been on bdw. v2: Fixes from Ville. v