On Thu, Sep 03, 2015 at 03:25:04PM +0300, Jani Nikula wrote:
> On Wed, 02 Sep 2015, Daniel Vetter wrote:
> > On Tue, Sep 01, 2015 at 01:16:49PM +0300, Jani Nikula wrote:
> >> On Thu, 27 Aug 2015, Sivakumar Thulasimani
> >> wrote:
> >> > From: "Thulasimani,Sivakumar"
> >> >
> >> > Compliance req
On Wed, 02 Sep 2015, Daniel Vetter wrote:
> On Tue, Sep 01, 2015 at 01:16:49PM +0300, Jani Nikula wrote:
>> On Thu, 27 Aug 2015, Sivakumar Thulasimani
>> wrote:
>> > From: "Thulasimani,Sivakumar"
>> >
>> > Compliance requires the driver to read dpcd register 0 to 12 and
>> > registers 0x200 to
On Tue, Sep 01, 2015 at 01:16:49PM +0300, Jani Nikula wrote:
> On Thu, 27 Aug 2015, Sivakumar Thulasimani
> wrote:
> > From: "Thulasimani,Sivakumar"
> >
> > Compliance requires the driver to read dpcd register 0 to 12 and
> > registers 0x200 to 0x205 to be read always.
> > Current code performs
On Thu, 27 Aug 2015, Sivakumar Thulasimani
wrote:
> From: "Thulasimani,Sivakumar"
>
> Compliance requires the driver to read dpcd register 0 to 12 and
> registers 0x200 to 0x205 to be read always.
> Current code performs dpcd read for short pulse interrupts only
> if the sink is enabled. This pa
From: "Thulasimani,Sivakumar"
Compliance requires the driver to read dpcd register 0 to 12 and
registers 0x200 to 0x205 to be read always.
Current code performs dpcd read for short pulse interrupts only
if the sink is enabled. This patch forces read for link status
and registers 0 to 12.
Signed-
