[Intel-gfx] [PATCH 1/3] drm/i915: implement IPS feature

2013-05-31 Thread Paulo Zanoni
From: Paulo Zanoni Intermediate Pixel Storage is a feature that should reduce the number of times the display engine wakes up memory to read pixels, so it should allow deeper PC states. IPS can only be enabled on ULT pipe A with 8:8:8 pipe pixel formats. With eDP 1920x1080 and correct watermarks

Re: [Intel-gfx] [PATCH 1/3] drm/i915: implement IPS feature

2013-05-31 Thread Daniel Vetter
On Thu, May 23, 2013 at 06:26:28PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > Intermediate Pixel Storage is a feature that should reduce the number > of times the display engine wakes up memory to read pixels, so it > should allow deeper PC states. IPS can only be enabled on ULT pipe A >

Re: [Intel-gfx] [PATCH 1/3] drm/i915: implement IPS feature

2013-05-31 Thread Rodrigo Vivi
Reviewed-by: Rodrigo Vivi On Thu, May 23, 2013 at 6:26 PM, Paulo Zanoni wrote: > From: Paulo Zanoni > > Intermediate Pixel Storage is a feature that should reduce the number > of times the display engine wakes up memory to read pixels, so it > should allow deeper PC states. IPS can only be enab

[Intel-gfx] [PATCH 1/3] drm/i915: implement IPS feature

2013-05-23 Thread Paulo Zanoni
From: Paulo Zanoni Intermediate Pixel Storage is a feature that should reduce the number of times the display engine wakes up memory to read pixels, so it should allow deeper PC states. IPS can only be enabled on ULT pipe A with 8:8:8 pipe pixel formats. With eDP 1920x1080 and correct watermarks

Re: [Intel-gfx] [PATCH 1/3] drm/i915: implement IPS feature

2013-05-21 Thread Daniel Vetter
On Thu, May 16, 2013 at 04:54:04PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > Intermediate Pixel Storage is a feature that should reduce the number > of times the display engine wakes up memory to read pixels, so it > should allow deeper PC states. IPS can only be enabled on ULT pipe A >

Re: [Intel-gfx] [PATCH 1/3] drm/i915: implement IPS feature

2013-05-17 Thread Rodrigo Vivi
Reviewed-by: Rodrigo Vivi On Thu, May 16, 2013 at 4:54 PM, Paulo Zanoni wrote: > From: Paulo Zanoni > > Intermediate Pixel Storage is a feature that should reduce the number > of times the display engine wakes up memory to read pixels, so it > should allow deeper PC states. IPS can only be enab

[Intel-gfx] [PATCH 1/3] drm/i915: implement IPS feature

2013-05-16 Thread Paulo Zanoni
From: Paulo Zanoni Intermediate Pixel Storage is a feature that should reduce the number of times the display engine wakes up memory to read pixels, so it should allow deeper PC states. IPS can only be enabled on ULT pipe A with 8:8:8 pipe pixel formats. With eDP 1920x1080 and correct watermarks

Re: [Intel-gfx] [PATCH 1/3] drm/i915: implement IPS feature

2013-05-15 Thread Chris Wilson
On Mon, May 13, 2013 at 04:00:08PM -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > Intermediate Pixel Storage is a feature that should reduce the number > of times the display engine wakes up memory to read pixels, so it > should allow deeper PC states. IPS can only be enabled on ULT port A >

[Intel-gfx] [PATCH 1/3] drm/i915: implement IPS feature

2013-05-13 Thread Paulo Zanoni
From: Paulo Zanoni Intermediate Pixel Storage is a feature that should reduce the number of times the display engine wakes up memory to read pixels, so it should allow deeper PC states. IPS can only be enabled on ULT port A with 8:8:8 pipe pixel formats. With eDP 1920x1080 and correct watermarks