Re: [Intel-gfx] [PATCH 1/3] drm/i915/cnl: Fix PORT_TX_DW5/7 register address

2018-02-16 Thread Rodrigo Vivi
On Thu, Feb 15, 2018 at 03:43:46PM -0800, Rodrigo Vivi wrote: > On Thu, Feb 15, 2018 at 04:02:46PM +0200, Jani Nikula wrote: > > On Thu, 15 Feb 2018, Mahesh Kumar wrote: > > > Register Address for CNL_PORT_DW5_LN0_D is 0x162E54, but current code is > > > defining it as 0x162ED4. Similarly for CNL_

Re: [Intel-gfx] [PATCH 1/3] drm/i915/cnl: Fix PORT_TX_DW5/7 register address

2018-02-15 Thread Rodrigo Vivi
On Thu, Feb 15, 2018 at 04:02:46PM +0200, Jani Nikula wrote: > On Thu, 15 Feb 2018, Mahesh Kumar wrote: > > Register Address for CNL_PORT_DW5_LN0_D is 0x162E54, but current code is > > defining it as 0x162ED4. Similarly for CNL_PORT_DW7_LN0_D register address > > is defined 0x162EDC instead of 0x1

Re: [Intel-gfx] [PATCH 1/3] drm/i915/cnl: Fix PORT_TX_DW5/7 register address

2018-02-15 Thread Jani Nikula
On Thu, 15 Feb 2018, Mahesh Kumar wrote: > Register Address for CNL_PORT_DW5_LN0_D is 0x162E54, but current code is > defining it as 0x162ED4. Similarly for CNL_PORT_DW7_LN0_D register address > is defined 0x162EDC instead of 0x162E5C, fix it. Which commit introduced the bug? Please add Fixes: an

[Intel-gfx] [PATCH 1/3] drm/i915/cnl: Fix PORT_TX_DW5/7 register address

2018-02-15 Thread Mahesh Kumar
Register Address for CNL_PORT_DW5_LN0_D is 0x162E54, but current code is defining it as 0x162ED4. Similarly for CNL_PORT_DW7_LN0_D register address is defined 0x162EDC instead of 0x162E5C, fix it. Signed-off-by: Mahesh Kumar --- drivers/gpu/drm/i915/i915_reg.h | 4 ++-- 1 file changed, 2 inserti