n Fri, Jul 13, 2018 at 10:48:02AM +0200, Daniel Vetter wrote:
> On Thu, Jul 12, 2018 at 08:23:05PM +0300, Ville Syrjälä wrote:
> > On Thu, Jul 12, 2018 at 07:03:58PM +0200, Daniel Vetter wrote:
> > > On Thu, Jul 12, 2018 at 6:24 PM, Lucas De Marchi
> > > wrote:
> > > > On Thu, Jul 12, 2018 at 05:0
On Thu, Jul 12, 2018 at 08:23:05PM +0300, Ville Syrjälä wrote:
> On Thu, Jul 12, 2018 at 07:03:58PM +0200, Daniel Vetter wrote:
> > On Thu, Jul 12, 2018 at 6:24 PM, Lucas De Marchi
> > wrote:
> > > On Thu, Jul 12, 2018 at 05:04:03PM +0200, Daniel Vetter wrote:
> > >> On Mon, Jul 09, 2018 at 09:22:
On Thu, Jul 12, 2018 at 07:03:58PM +0200, Daniel Vetter wrote:
> On Thu, Jul 12, 2018 at 6:24 PM, Lucas De Marchi
> wrote:
> > On Thu, Jul 12, 2018 at 05:04:03PM +0200, Daniel Vetter wrote:
> >> On Mon, Jul 09, 2018 at 09:22:21AM -0700, Lucas De Marchi wrote:
> >> > Instead of defining all registe
On Thu, Jul 12, 2018 at 6:24 PM, Lucas De Marchi
wrote:
> On Thu, Jul 12, 2018 at 05:04:03PM +0200, Daniel Vetter wrote:
>> On Mon, Jul 09, 2018 at 09:22:21AM -0700, Lucas De Marchi wrote:
>> > Instead of defining all registers twice, define just a PCH_GPIO_BASE
>> > that has the same address as P
On Thu, Jul 12, 2018 at 05:04:03PM +0200, Daniel Vetter wrote:
> On Mon, Jul 09, 2018 at 09:22:21AM -0700, Lucas De Marchi wrote:
> > Instead of defining all registers twice, define just a PCH_GPIO_BASE
> > that has the same address as PCH_GPIO_A and use that to calculate all
> > the others. This a
On Mon, Jul 09, 2018 at 09:22:21AM -0700, Lucas De Marchi wrote:
> Instead of defining all registers twice, define just a PCH_GPIO_BASE
> that has the same address as PCH_GPIO_A and use that to calculate all
> the others. This also brings VLV and !HAS_GMCH_DISPLAY in line, doing
> the same thing.
>
Instead of defining all registers twice, define just a PCH_GPIO_BASE
that has the same address as PCH_GPIO_A and use that to calculate all
the others. This also brings VLV and !HAS_GMCH_DISPLAY in line, doing
the same thing.
This also rewrites the GMBUS[05] registers since they depend on
gpio_mmio