On 04/23/2012 05:56 PM, Daniel Vetter wrote:
On Mon, Apr 23, 2012 at 05:38:27PM +0200, Carsten Emde wrote:
On 04/23/2012 05:22 PM, Daniel Vetter wrote:
On Mon, Apr 23, 2012 at 05:06:53PM +0200, Carsten Emde wrote:
On 04/23/2012 04:22 PM, Daniel Vetter wrote:
On Mon, Apr 23, 2012 at 04:00:23PM
On Mon, Apr 23, 2012 at 05:38:27PM +0200, Carsten Emde wrote:
> On 04/23/2012 05:22 PM, Daniel Vetter wrote:
> >On Mon, Apr 23, 2012 at 05:06:53PM +0200, Carsten Emde wrote:
> >>On 04/23/2012 04:22 PM, Daniel Vetter wrote:
> >>>On Mon, Apr 23, 2012 at 04:00:23PM +0200, Carsten Emde wrote:
> >>> [..
On 04/23/2012 05:22 PM, Daniel Vetter wrote:
On Mon, Apr 23, 2012 at 05:06:53PM +0200, Carsten Emde wrote:
On 04/23/2012 04:22 PM, Daniel Vetter wrote:
On Mon, Apr 23, 2012 at 04:00:23PM +0200, Carsten Emde wrote:
[..]
The idea was to boot with kms and see whether any of these values would
res
On Mon, Apr 23, 2012 at 05:06:53PM +0200, Carsten Emde wrote:
> On 04/23/2012 04:22 PM, Daniel Vetter wrote:
> >On Mon, Apr 23, 2012 at 04:00:23PM +0200, Carsten Emde wrote:
> >># intel_reg_write 0x61250 0x8000
> >>Value before: 0xE000
> >>Value after: 0x8000
> >># intel_reg_read 0x6125
On 04/23/2012 04:22 PM, Daniel Vetter wrote:
On Mon, Apr 23, 2012 at 04:00:23PM +0200, Carsten Emde wrote:
# intel_reg_write 0x61250 0x8000
Value before: 0xE000
Value after: 0x8000
# intel_reg_read 0x61254
0x61254 : 0xB4A0B4A
# intel_reg_write 0x61250 0xa000
Value before: 0x8000
On Mon, Apr 23, 2012 at 04:00:23PM +0200, Carsten Emde wrote:
> # intel_reg_write 0x61250 0x8000
> Value before: 0xE000
> Value after: 0x8000
> # intel_reg_read 0x61254
> 0x61254 : 0xB4A0B4A
>
> # intel_reg_write 0x61250 0xa000
> Value before: 0x8000
> Value after: 0xA000
>
On 04/23/2012 03:39 PM, Daniel Vetter wrote:
On Mon, Apr 23, 2012 at 03:15:02PM +0200, Carsten Emde wrote:
On 04/23/2012 02:36 PM, Daniel Vetter wrote:
On Mon, Apr 23, 2012 at 02:32:57PM +0200, Daniel Vetter wrote:
On Mon, Apr 23, 2012 at 01:54:23PM +0200, Carsten Emde wrote:
On 04/23/2012 11
On Mon, Apr 23, 2012 at 01:32:31PM +0100, Chris Wilson wrote:
> On Mon, 23 Apr 2012 14:21:20 +0200, Daniel Vetter wrote:
> > On my specs bit29 is pipe assignement, we should set it if the panel is on
> > pipe B (well, it just takes the pll to do the modulation from that pipe
> > then).
>
> On CTL
On Mon, Apr 23, 2012 at 03:15:02PM +0200, Carsten Emde wrote:
> On 04/23/2012 02:36 PM, Daniel Vetter wrote:
> >On Mon, Apr 23, 2012 at 02:32:57PM +0200, Daniel Vetter wrote:
> >>On Mon, Apr 23, 2012 at 01:54:23PM +0200, Carsten Emde wrote:
> >>>On 04/23/2012 11:32 AM, Daniel Vetter wrote:
> Th
On 04/23/2012 02:36 PM, Daniel Vetter wrote:
On Mon, Apr 23, 2012 at 02:32:57PM +0200, Daniel Vetter wrote:
On Mon, Apr 23, 2012 at 01:54:23PM +0200, Carsten Emde wrote:
On 04/23/2012 11:32 AM, Daniel Vetter wrote:
There's a bit in the docs for gen4 only that says whether the
backlight control
On Mon, Apr 23, 2012 at 02:32:57PM +0200, Daniel Vetter wrote:
> On Mon, Apr 23, 2012 at 01:54:23PM +0200, Carsten Emde wrote:
> > On 04/23/2012 11:32 AM, Daniel Vetter wrote:
> > >There's a bit in the docs for gen4 only that says whether the
> > >backlight control is inverted. And both the quirk w
On Mon, 23 Apr 2012 14:21:20 +0200, Daniel Vetter wrote:
> On my specs bit29 is pipe assignement, we should set it if the panel is on
> pipe B (well, it just takes the pll to do the modulation from that pipe
> then).
On CTL1 rather than CTL2, if that makes a difference. Listed in both the
IBX and
On Mon, Apr 23, 2012 at 01:54:23PM +0200, Carsten Emde wrote:
> On 04/23/2012 11:32 AM, Daniel Vetter wrote:
> >There's a bit in the docs for gen4 only that says whether the
> >backlight control is inverted. And both the quirk we have and
> >all bugs only concern i965gm and gm45 (and mostly Acer) a
On Mon, Apr 23, 2012 at 10:53:31AM +0100, Chris Wilson wrote:
> On Mon, 23 Apr 2012 11:32:14 +0200, Daniel Vetter
> wrote:
> > There's a bit in the docs for gen4 only that says whether the
> > backlight control is inverted. And both the quirk we have and
> > all bugs only concern i965gm and gm45
On Mon, 23 Apr 2012 11:32:14 +0200, Daniel Vetter
wrote:
> There's a bit in the docs for gen4 only that says whether the
> backlight control is inverted. And both the quirk we have and
> all bugs only concern i965gm and gm45 (and mostly Acer) afaics.
>
> So lets drop the quirk and use the bit in
There's a bit in the docs for gen4 only that says whether the
backlight control is inverted. And both the quirk we have and
all bugs only concern i965gm and gm45 (and mostly Acer) afaics.
So lets drop the quirk and use the bit instead.
Also clean up the BLC register definitions a bit by correctly
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