Sorry for the delay.
Also for v5:
Reviewed-by: Rodrigo Vivi
On Tue, Jan 13, 2015 at 4:36 PM, Daniel Vetter wrote:
> On Tue, Jan 13, 2015 at 08:48:24AM +0800, Zhipeng Gong wrote:
>> On Skylake GT3 we have 2 Video Command Streamers (VCS), which is
>> asymmetrical.
>> For example, HEVC GPU comman
On Tue, Jan 13, 2015 at 08:48:24AM +0800, Zhipeng Gong wrote:
> On Skylake GT3 we have 2 Video Command Streamers (VCS), which is asymmetrical.
> For example, HEVC GPU commands can be only dispatched to VCS1 ring.
> But userspace has no control when using VCS1 or VCS2. This patch introduces
> a mech
On Skylake GT3 we have 2 Video Command Streamers (VCS), which is asymmetrical.
For example, HEVC GPU commands can be only dispatched to VCS1 ring.
But userspace has no control when using VCS1 or VCS2. This patch introduces
a mechanism to avoid the default ping-pong mode and use one specific ring
th
On Broadwell GT3 we have 2 Video Command Streamers (VCS), but userspace
has no control when using VCS1 or VCS2. This patch introduces a mechanism
to avoid the default ping-pong mode and use one specific ring through
execution flag.
Signed-off-by: Zhipeng Gong
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drivers/gpu/drm/i915/i915_gem_ex
