Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fix fbc + rc6 combination on SNB

2013-11-19 Thread Stéphane Marchesin
On Tue, Nov 19, 2013 at 2:39 AM, Daniel Vetter wrote: > On Tue, Nov 19, 2013 at 3:08 AM, Rodrigo Vivi wrote: >> I'm just on going with another -collector update and since this patch >> fixes a bug I think it would be a good one to include. >> >> But since it was bikeshedded it is better to ask Vi

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fix fbc + rc6 combination on SNB

2013-11-19 Thread Ville Syrjälä
On Mon, Nov 18, 2013 at 06:08:15PM -0800, Rodrigo Vivi wrote: > I'm just on going with another -collector update and since this patch > fixes a bug I think it would be a good one to include. > > But since it was bikeshedded it is better to ask Ville and Chris if > their comments was a NAck or I ca

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fix fbc + rc6 combination on SNB

2013-11-19 Thread Daniel Vetter
On Tue, Nov 19, 2013 at 3:08 AM, Rodrigo Vivi wrote: > I'm just on going with another -collector update and since this patch > fixes a bug I think it would be a good one to include. > > But since it was bikeshedded it is better to ask Ville and Chris if > their comments was a NAck or I can conside

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fix fbc + rc6 combination on SNB

2013-11-18 Thread Rodrigo Vivi
I'm just on going with another -collector update and since this patch fixes a bug I think it would be a good one to include. But since it was bikeshedded it is better to ask Ville and Chris if their comments was a NAck or I can consider to get for -collector. Thanks On Sat, Nov 2, 2013 at 9:10 A

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fix fbc + rc6 combination on SNB

2013-11-02 Thread Ville Syrjälä
On Fri, Nov 01, 2013 at 05:02:52PM -0700, Ben Widawsky wrote: > On Sandybridge we must set the "PPGTT Render Target Base Address Valid > for FBC" bit as noted in the programming guide. We did this at clock > gating init. Thisbit is not saved and restored with RC6 power context, > so the resetting i

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Fix fbc + rc6 combination on SNB

2013-11-02 Thread Chris Wilson
On Fri, Nov 01, 2013 at 05:02:52PM -0700, Ben Widawsky wrote: > On Sandybridge we must set the "PPGTT Render Target Base Address Valid > for FBC" bit as noted in the programming guide. We did this at clock > gating init. Thisbit is not saved and restored with RC6 power context, > so the resetting i

[Intel-gfx] [PATCH 1/2] drm/i915: Fix fbc + rc6 combination on SNB

2013-11-01 Thread Ben Widawsky
On Sandybridge we must set the "PPGTT Render Target Base Address Valid for FBC" bit as noted in the programming guide. We did this at clock gating init. Thisbit is not saved and restored with RC6 power context, so the resetting it at ring flush should fix that. The effect of not doing this should