link:
https://lore.kernel.org/r/20231024010925.3949910-9-imre.deak%40intel.com
patch subject: [Intel-gfx] [PATCH 08/29] drm/dp: Add helpers to calculate the
link BW overhead
config: arm-s5pv210_defconfig
(https://download.01.org/0day-ci/archive/20231025/202310252345.i0qkzguh-...@intel.com
link:
https://lore.kernel.org/r/20231024010925.3949910-9-imre.deak%40intel.com
patch subject: [Intel-gfx] [PATCH 08/29] drm/dp: Add helpers to calculate the
link BW overhead
config: x86_64-buildonly-randconfig-003-20231024
(https://download.01.org/0day-ci/archive/20231024/202310242019.hp2ksem1
patch link:
https://lore.kernel.org/r/20231024010925.3949910-9-imre.deak%40intel.com
patch subject: [Intel-gfx] [PATCH 08/29] drm/dp: Add helpers to calculate the
link BW overhead
config: m68k-allyesconfig
(https://download.01.org/0day-ci/archive/20231024/202310241055.pz9vy06v-...@intel.com
Add helpers drivers can use to calculate the BW allocation overhead -
due to SSC, FEC, DSC and data alignment on symbol cycles - and the
channel coding efficiency - due to the 8b/10b, 128b/132b encoding. On
128b/132b links the FEC overhead is part of the coding efficiency, so
not accounted for in t
