On Thu, Mar 07, 2013 at 11:43:14AM +0200, Ville Syrjälä wrote:
> On Wed, Mar 06, 2013 at 08:03:15PM -0300, Paulo Zanoni wrote:
> > From: Paulo Zanoni
> >
> > I couldn't find any evidence that this register exists on Gen2+. On
> > Gen 2/3/4 documents this register is listed as reserved and read-on
On Wed, Mar 06, 2013 at 08:03:15PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> I couldn't find any evidence that this register exists on Gen2+. On
> Gen 2/3/4 documents this register is listed as reserved and read-only.
> On the newer Gens this register is not even documented.
>
> Also a
On Wed, Mar 06, 2013 at 08:03:15PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni
>
> I couldn't find any evidence that this register exists on Gen2+. On
> Gen 2/3/4 documents this register is listed as reserved and read-only.
> On the newer Gens this register is not even documented.
DSPPOS goe
From: Paulo Zanoni
I couldn't find any evidence that this register exists on Gen2+. On
Gen 2/3/4 documents this register is listed as reserved and read-only.
On the newer Gens this register is not even documented.
Also all we do with this register is:
- Write 0 to it on i9xx_crtc_mode_set
-