[Intel-gfx] [PATCH 08/10] drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV

From: Ville Syrjälä CHV uses the gen8 shadow register mechanism so we shouldn't be checking the GT FIFO status. This effectively removes the posting read, so add an explicit posting read using FORCEWAKE_ACK_VLV (which is what use in vlv_forcewake_reset()). Reviewed-by: Mika Kuoppala Signed-off

Re: [Intel-gfx] [PATCH 08/10] drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV

On Mon, Apr 21, 2014 at 01:34:12PM +0530, deepa...@linux.intel.com wrote: > From: Ville Syrjälä > > CHV uses the gen8 shadow register mechanism so we shouldn't be > checking the GT FIFO status. > > This effectively removes the posting read, so add an explicit > posting read using FORCEWAKE_ACK_V

[Intel-gfx] [PATCH 08/10] drm/i915/chv: Skip gen6_gt_check_fifodbg() on CHV

From: Ville Syrjälä CHV uses the gen8 shadow register mechanism so we shouldn't be checking the GT FIFO status. This effectively removes the posting read, so add an explicit posting read using FORCEWAKE_ACK_VLV (which is what use in vlv_forcewake_reset()). Reviewed-by: Mika Kuoppala Signed-off