Re: [Intel-gfx] [PATCH 02/12] drm/i915: DSL_LINEMASK is 12 bits only on gen2

On Wed, 2 May 2012 22:55:44 -0300, Paulo Zanoni wrote: > From: Paulo Zanoni > > Gen3+ is 13 bits (12:0). Gen3+ is 13 bits (12:0), and on gen2 only (11:0). For both the high bits are marked reserved, read-only so continue to mask them. > Signed-off-by: Paulo Zanoni Reviewed-by: Chris Wilson

[Intel-gfx] [PATCH 02/12] drm/i915: DSL_LINEMASK is 12 bits only on gen2

From: Paulo Zanoni Gen3+ is 13 bits (12:0). Signed-off-by: Paulo Zanoni --- drivers/gpu/drm/i915/i915_reg.h |3 ++- drivers/gpu/drm/i915/intel_display.c | 11 --- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/dr