On Wed, 13 Oct 2010 16:00:44 -0500, Olof Johansson wrote:
> On Fri, Oct 8, 2010 at 4:17 PM, Jesse Barnes wrote:
> > I can't vouch for any particular set of values, but Bryan's analysis
> > looks good to me; only a few of the values actually matter, and for
> > those having slightly longer delays s
On Fri, Oct 8, 2010 at 4:17 PM, Jesse Barnes wrote:
> On Fri, 08 Oct 2010 21:28:01 +0100
> Chris Wilson wrote:
>
> > On Fri, 08 Oct 2010 10:58:40 +0100, Chris Wilson <
> ch...@chris-wilson.co.uk> wrote:
> > > Does any one have a strong "this will damage my hardware" objection?
> Are
> > > the val
On Fri, 08 Oct 2010 21:28:01 +0100
Chris Wilson wrote:
> On Fri, 08 Oct 2010 10:58:40 +0100, Chris Wilson
> wrote:
> > Does any one have a strong "this will damage my hardware" objection? Are
> > the values safe enough for *any* device?
>
> Or perhaps a better question is: does anyone else fee
On Fri, 08 Oct 2010 10:58:40 +0100, Chris Wilson
wrote:
> Does any one have a strong "this will damage my hardware" objection? Are
> the values safe enough for *any* device?
Or perhaps a better question is: does anyone else feel confident enough
in these defaults to ack them? ;-) Reviewed-by and
On 10/08/2010 02:35 PM, Bryan Freed wrote:
I took a look at several panel datasheets I found around here, and the one
issue some of them mentioned is that these timings (particularly T2 on
powerup and T3 on powerdown) are used to prevent latch-up.
That makes sense. We do not want to drive pixel
I took a look at several panel datasheets I found around here, and the one
issue some of them mentioned is that these timings (particularly T2 on
powerup and T3 on powerdown) are used to prevent latch-up.
That makes sense. We do not want to drive pixels to a device that has 0V on
VDD. This chang
On Thu, 7 Oct 2010 17:05:46 -0700, Bryan Freed wrote:
> The time between start of the pixel clock and backlight enable is a basic
> panel timing constraint. If the Panel Power On/Off registers are found
> to be 0, assume we are booting without VBIOS initialization and set these
> registers to som
The time between start of the pixel clock and backlight enable is a basic
panel timing constraint. If the Panel Power On/Off registers are found
to be 0, assume we are booting without VBIOS initialization and set these
registers to something reasonable.
Change-Id: Ibed6cc10d46bf52fd92e0beb25ae352
